An EEPROM memory cell typically comprises a floating-gate field-effect transistor. The floating-gate of a programmed memory cell is charged with electrons, and the electrons in turn render the source-drain path under the charged floating gate nonconductive when a predetermined voltage is applied to the control gate. The nonconductive state is read by a sense amplifier as a "zero" bit. The floating-gate of a non-programmed cell is neutrally charged (or slightly positively or negatively charged) such that the source-drain path under the non-programmed floating gate is conductive when the predetermined voltage is applied to the control gate. The conductive state is read by a sense amplifier as a "one" bit.
In many EEPROM or flash EEPROM devices it is necessary to generate a negative voltage to remove the electron charge from a programmed memory cell, so that the memory cell can be returned to a conductive or erased state. The negative voltage is usually generated by a negative charge pump. Additional negative charge pumps may be employed to selectively enable and disable the negative erase voltage onto blocks of memory cells.
Circuits for generating negative voltage pulses by means of a charge-pump circuit are well-known and are used in commercially available flash EEPROMs, such as part number T29F256 manufactured and sold by Texas Instruments Incorporated.
Prior art charge pumps require high voltage transistors in the voltage multiplier chain. High voltage transistors degrade the charge pump performance due to their high body effect. Also, the charge transferring transistors trap charges at their own gates. The trapped charge causes high electrical field stress on gate oxide (reliability problem) and sometimes even causes the pump to collapse (functionality problem).